| 摘要 |
<p>An integrated circuit includes memory circuitry with a number of bit line structures, each including at least three bit lines; a number of word lines that intersect with the bit line structures at a number of sites; and a number of switching devices located at the sites. A number of V<SUB>SS </SUB>planes are interconnected with the switching devices. The switching devices and the V<SUB>SS </SUB>planes are formed at a first level. The V<SUB>SS </SUB>planes can be formed as substantially complementary interlocking regions that also form functional portions of the switching devices. The switching devices can be connected between an adjacent one of the word lines and a selected one of the bit lines of an adjacent one of the bit line structures for selective electrical conduction therebetween upon activation by the adjacent one of the word lines.</p> |
