发明名称 Select transistor, method for making select transistor, memory device, and method for manufacturing memory device
摘要 A select transistor for use in a memory device including a plurality of memory transistors connected in series includes a tunnel insulating layer formed on a semiconductor substrate, a charge storage layer formed on the tunnel insulating layer, a blocking insulating layer formed on the charge storage layer and configured to be irradiated with a gas cluster ion beam containing argon as source gas, a gate electrode formed on the blocking insulating layer, and a source/drain region formed within the semiconductor substrate at both sides of the gate electrode.
申请公布号 US8785334(B2) 申请公布日期 2014.07.22
申请号 US201213478573 申请日期 2012.05.23
申请人 Tokyo Electron Limited 发明人 Tanaka Yoshitsugu
分类号 H01L21/00 主分类号 H01L21/00
代理机构 Nath Goldberg & Meyer 代理人 Nath Goldberg & Meyer ;Meyer Jerald L.
主权项 1. A method for manufacturing a memory device including a plurality of memory transistors connected in series and select transistors disposed in both ends of the plurality of memory transistors, comprising: forming a tunnel insulating layer on a semiconductor substrate; forming a charge storage layer on the tunnel insulating layer; forming a blocking insulating layer on the charge storage layer; selectively irradiating the blocking insulating layer in a region where the select transistor is to be formed, with a gas cluster ion beam containing argon as source gas; forming a gate electrode on the blocking insulating layer; patterning the tunnel insulating layer, the charge storage layer, blocking insulating layer and the gate electrode; and forming a source/drain region within the semiconductor substrate at both sides of the patterned gate electrode.
地址 Tokyo JP