Clock circuits and methods

摘要

Integrated circuits, apparatuses and methods are disclosed, such as a method that includes generating an internal clock signal, receiving an external clock signal, and providing a mixed clock signal at an output. The mixed clock signal has a frequency ranging from a defined maximum frequency of the external clock signal to a frequency margin below a frequency of the internal clock signal. Additional integrated circuits, apparatus and methods are described.

主权项

1. An integrated circuit comprising:
a first input to receive an internal clock signal; a second input to receive an external clock signal; and a comparator coupled to the first input and the second input, the comparator comprising:
a first plurality of flip-flops coupled to the first input;a second plurality of flip-flops coupled to the second input; anda latch, coupled to an output of the first plurality of flip-flops and an output of the second plurality of flip-flops, that provides either an enable signal for the external clock signal or an enable signal for the internal clock signal in response to the frequency of the external clock signal being less than the frequency of the internal clock signal by less than the frequency margin wherein the frequency margin is determined by a quantity of flip-flops in each of the first and second pluralities of flip-flops.