METHOD FOR MANUFACTURING MULTI-GATE TRANSISTOR DEVICE

摘要

A method for manufacturing multi-gate transistor device includes providing a semiconductor substrate having a patterned semiconductor layer, a gate dielectric layer and a gate layer sequentially formed thereon, forming a multiple insulating layer sequentially having a first insulating layer and a second insulating layer and covering the patterned semiconductor layer and the gate layer, removing a portion of the multiple insulating layer to simultaneously form a first spacer around the gate layer and a second spacer around the patterned semiconductor layer, removing the second spacer to expose a portion of the first insulating layer covering the patterned semiconductor layer and simultaneously removing a portion of the first spacer to form a third spacer around the gate layer, and removing the exposed first insulating layer to expose the patterned semiconductor layer.

主权项

1. A method for manufacturing multi-gate transistor device, comprising:
providing a semiconductor substrate having a patterned semiconductor layer, a gate dielectric layer and a gate layer formed thereon, and the gate layer covering a portion of the patterned semiconductor layer; forming a multiple insulating layer on the semiconductor substrate, the multiple insulating layer covering the patterned semiconductor layer and the gate layer, wherein the multiple insulating layer sequentially has a first insulating layer and a second insulating layer; performing a first etching process to remove a portion of the multiple insulating layer to simultaneously form a first spacer around the gate layer and a second spacer around the patterned semiconductor layer; removing the second spacer to expose a portion of the first insulating layer and simultaneously removing a portion of the first spacer to form a third spacer around the gate layer, the first insulating layer still covering the patterned semiconductor layer; and removing the exposed first insulating layer to expose the patterned semiconductor layer.