INTEGRATION OF 3D STACKED IC DEVICE WITH PERIPHERAL CIRCUITS

摘要

An integrated circuit device includes a substrate including a first region and a second region. A pit is formed in the first region. A stack of active layers alternating with insulating layers is deposited in the pit. The stack includes a particular insulating layer. The particular insulating layer has a first thickness, where a sum of the first thickness, thickness of active layers, and thicknesses of other insulating layers is essentially equal to a depth of the pit. The first thickness is different than the thicknesses of the other insulating layers by an amount within a range of process variations for the depth of the pit, for the thicknesses of the active layers, and for the thicknesses of other insulating layers. The device includes a planarized surface over the first and second regions, where an uppermost one of the active layers has a top surface below the planarized surface.

主权项

1. A method for manufacturing an integrated circuit device, comprising:
etching a substrate to form a pit, the pit having a target depth below a top surface of the substrate; measuring a depth of the etched pit; depositing a stack of active layers alternating with insulating layers on the substrate at least in the etched pit, wherein the stack has at least one insulating layer having a thickness based on a difference between the target depth and the measured depth of the etched pit; and applying a planarizing process to provide a planarized surface, wherein an uppermost one of the active layers has a top surface below the planarized surface.