发明名称 SEMICONDUCTOR ELEMENT MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor element manufacturing method which can inhibit generation of voids generated between a semiconductor laminated structure and a support substrate when the semiconductor laminated structure and the support substrate are bonded.SOLUTION: A semiconductor element manufacturing method comprises: an insulation film formation process of forming an insulation film on a part of a top face of a semiconductor laminated structure; a process of increasing a tilt angle at an outer peripheral end of the insulation film by etching the outer peripheral end of the insulation film; a process of forming electrodes in a region on the top face of the semiconductor laminated structure where the insulation film is not formed; a support substrate; and a process of bonding an electrode formation surface side of the semiconductor laminated structure with the support substrate.
申请公布号 JP2014132624(A) 申请公布日期 2014.07.17
申请号 JP20130001768 申请日期 2013.01.09
申请人 NICHIA CHEM IND LTD 发明人 HIRANO KOSAKU
分类号 H01L33/32 主分类号 H01L33/32
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