A SUCCESSIVE APPROXIMATION ANALOG-TO-DIGITAL CONVERSION ARCHITECTURAL ARRANGMENT FOR RECEIVERS
摘要
<p>An apparatus and method of successive approximation analog-to-digital conversion for receivers comprising that during a sample mode, connecting an array of capacitors to a plurality of sampling switches coupled to a plurality of amplified input signals, and during a conversion mode, connecting in common the array of capacitors to a comparator and isolating the array of capacitors from the plurality of sampling switches. Additionally, filtering is done by the summation of samples at phase offsets.</p>
申请公布号
WO2014110315(A1)
申请公布日期
2014.07.17
申请号
WO2014US10963
申请日期
2014.01.10
申请人
INTEL CORPORATION;COWLEY, NICHOLAS P.;ALI, ISAAC;SUETINOV, VIATCHESLAV I.;PINSON, KEITH
发明人
COWLEY, NICHOLAS P.;ALI, ISAAC;SUETINOV, VIATCHESLAV I.;PINSON, KEITH