| 发明名称 |
DEFECT ANALYSIS SYSTEM FOR ERROR IMPACT REDUCTION |
| 摘要 |
An apparatus includes a network interface, memory, and a processor. The processor is coupled with the network interface and memory. The processor is configured to analyze a first set of data associated with a plurality of data sources. Analyzing the first set of data associated with the plurality of data sources determines a plurality of relationships among the first set of data. The processor is configured to store indications of the plurality of relationships among the first set of data. An indication of a relationship indicates a possible software defect. The processor is configured to generate rules based, at least in part, on the first set of data associated with a plurality of data sources. A rule indicates a possible software defect. |
| 申请公布号 |
US2014201573(A1) |
申请公布日期 |
2014.07.17 |
| 申请号 |
US201313740890 |
申请日期 |
2013.01.14 |
| 申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
Huang Wei;Li Jian;Liu Su;Yan Shunguo |
| 分类号 |
G06F11/36 |
主分类号 |
G06F11/36 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A method comprising:
analyzing a first set of data associated with a plurality of data sources, wherein analyzing the first set of data associated with the plurality of data sources determines a plurality of relationships among the first set of data; storing indications of the plurality of relationships among the first set of data, wherein an indication of a relationship indicates a possible software defect; and generating rules based, at least in part, on the first set of data associated with the plurality of data sources, wherein a rule indicates a possible software defect. |
| 地址 |
Armonk NY US |
