发明名称 Integrated circuit packaging system with interposer shield and method of manufacture thereof
摘要 A method of manufacture of an integrated circuit packaging system includes: providing a bottom substrate; attaching a first integrated circuit die to the bottom substrate; forming an interposer including: forming an intermediate substrate; forming a shield on the intermediate substrate; and applying a wire-in-film adhesive to the shield; and attaching the interposer to the first integrated circuit die with the wire-in-film adhesive.
申请公布号 US8779562(B2) 申请公布日期 2014.07.15
申请号 US201113071228 申请日期 2011.03.24
申请人 STATS ChipPAC Ltd. 发明人 Lee SeongMin;Song Sungmin;Mun SeongHun
分类号 H01L23/552;H01L23/31;H01L25/10 主分类号 H01L23/552
代理机构 Ishimaru & Associates LLP 代理人 Ishimaru & Associates LLP
主权项 1. A method of manufacture of an integrated circuit packaging system comprising: providing a bottom substrate; attaching a first integrated circuit die to the bottom substrate; forming an interposer including: providing an intermediate substrate, the intermediate substrate is a step-down substrate,depositing a shield directly on the intermediate substrate, the shield is connectible through the intermediate substrate to a ground and the shield is a conductive paste of inductive material for forming an electromagnetic interference and noise suppression structure, andapplying an adhesive to the shield; attaching the interposer to the first integrated circuit die with the adhesive; molding a first encapsulation over the interposer, the first encapsulation completely covering vertical sides of the step-down substrate; forming contact pads on the interposer; providing an upper substrate having a top surface and a bottom surface; attaching a second integrated circuit die to the top surface of the upper substrate; forming interconnects on the bottom surface of the upper substrate; attaching the upper substrate to the interposer such that the interconnects and the contact pads form electrical connections; and molding a second encapsulation over the upper substrate, the second encapsulation covering the second integrated circuit die.
地址 Singapore SG