Apparatus and method for delayed synchronous data reception

摘要

An apparatus that compensates for misalignment on a synchronous data bus. The apparatus includes a resistor network and a synchronous receiver disposed within a receiving device. The resistor network is configured to provide a ratio signal that indicates an amount to delay a data bit signal associated with a data group, where the data bit signal is transmitted by a transmitting device along with a data strobe signal. The synchronous receiver receives the data bit and the data strobe signals, and includes a delay-locked loop (DLL). The DLL is coupled to the ratio signal, and is configured generate a delayed data bit signal, where the DLL adds the amount of delay to the data bit signal to generate the delayed data bit signal, and where the delayed bit signal is delayed relative to the data strobe signal by the amount, thus allowing for proper reception of the data bit signal.

主权项

1. An apparatus that compensates for misalignment on a synchronous data bus, the apparatus comprising:
a resistor network, configured to provide a ratio signal that indicates an amount to delay a data bit signal associated with a data group, wherein said data bit signal is transmitted by a transmitting device along with a data strobe signal; and a synchronous receiver disposed within a receiving device, configured to receive said data bit signal and said data strobe signal, said synchronous receiver comprising:
a delay-locked loop (DLL), coupled to said ratio signal, configured to generate a delayed data bit signal, wherein said DLL adds said amount of delay to said data bit signal to generate said delayed data bit signal, and wherein said delayed data bit signal is delayed relative to said data strobe signal by said amount, thus allowing for proper reception of said data bit signal by said synchronous receiver.