发明名称 TRACING SPECULATIVELY EXECUTED INSTRUCTIONS
摘要 A trace unit for generating items of trace data indicative of processing activities of a processor executing a stream of instructions, the unit includes trace circuitry for monitoring a behaviour of the processor; storage circuitry for storing current trace control data for controlling the trace circuitry; a data store for storing at least some of the trace control data; the trace circuitry being configured to store the trace control data in the data store in response to detection of execution of the group of instructions, wherein the trace circuitry is responsive to detecting the at least one processor cancelling at least one group of the speculatively executed instructions to retrieve at least some of the trace control data stored in the data store for the group of instructions executed before the cancelled speculatively executed instructions and to store the retrieved trace control data in the storage circuitry.
申请公布号 US2014195786(A1) 申请公布日期 2014.07.10
申请号 US201414205438 申请日期 2014.03.12
申请人 ARM Limited 发明人 GILKERSON Paul Anthony;HORLEY John Michael
分类号 G06F9/30 主分类号 G06F9/30
代理机构 代理人
主权项 1. A trace unit for generating items of trace data indicative of processing activities of at least one processor executing at least one stream of instructions, said at least one stream of instructions comprising a plurality of groups of instructions, said at least one processor executing at least some of said instructions speculatively, said trace unit comprising: trace circuitry configured to monitor a behaviour of said at least one processor, wherein said trace circuitry is configured to be controlled by trace control data; a data store configured to store at least some of said trace control data associated with a corresponding one of said groups of instructions that has been executed; wherein said trace circuitry is configured to update said data store to store said at least some of said trace control data in said data store, in response to detecting execution of said corresponding one of said group of instructions; wherein said trace circuitry is responsive to detecting a cancelled group of instructions from said plurality of groups of instructions, wherein said cancelled group of instructions has been speculatively executed and cancelled by said at least one processor, to retrieve at least some of said trace control data stored in said data store and to control said trace-circuitry with said retrieved trace control data.
地址 Cambridge GB
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