发明名称 |
Successive approximation A/D converter |
摘要 |
A successive-approximation A/D converter includes a reference voltage generator configured to generate a reference voltage, a comparator configured to receive an input analog signal and generate a voltage difference by comparing the input analog signal and the reference voltage, an error-correction circuit including a variable capacitor configured to correct the voltage difference based on a capacitance of the variable capacitor, an error-correction controller configured to retrieve from memory a correction amount and control the error-correction circuit to vary the capacitance of the variable capacitor according to the correction amount, and a successive approximation register logic circuit configured to generate an output digital signal based on the voltage difference from the comparator. |
申请公布号 |
US8766831(B2) |
申请公布日期 |
2014.07.01 |
申请号 |
US201313784602 |
申请日期 |
2013.03.04 |
申请人 |
Kabushiki Kaisha Toshiba |
发明人 |
Ikeda Shinichi;Ishii Hirotomo |
分类号 |
H03M1/06 |
主分类号 |
H03M1/06 |
代理机构 |
Patterson & Sheridan, LLP |
代理人 |
Patterson & Sheridan, LLP |
主权项 |
1. A successive approximation analog-to-digital (A/D) converter, comprising:
a reference voltage generator configured to generate a reference voltage; a comparator configured to receive an input analog signal and generate a voltage difference by comparing the input analog signal and the reference voltage; an error-correction circuit including a variable capacitor configured to correct the voltage difference based on a capacitance of the variable capacitor; and an error-correction controller configured to retrieve from memory a correction amount and control the error-correction circuit to vary the capacitance of the variable capacitor according to the correction amount. |
地址 |
Tokyo JP |