SINGLE SERDES TRANSMITTER DRIVER DESIGN FOR BOTH ETHERNET AND PERIPHERAL COMPONENT INTERCONNECT EXPRESS APPLICATIONS

摘要

An apparatus includes a first coding circuit, a second coding circuit, and a plurality of source series terminated driver slices. The first coding circuit may be configured to generate a plurality of digital filter control codes in response to a plurality of filter coefficients and a control signal. The control signal selects between a plurality of communication specifications. The second coding circuit may be configured to generate a plurality of driver slice control codes in response to the plurality of digital filter control codes. The plurality of source series terminated driver slices configured to generate an output signal according to a selected one of the plurality of communication specifications in response to the plurality of driver slice control codes, a main cursor signal, a pre-cursor signal, and a post cursor signal.

主权项

1. An apparatus comprising:
a first coding circuit configured to generate a plurality of digital filter control codes in response to a plurality of filter coefficients and a control signal, wherein said control signal selects between a plurality of communication specifications; a second coding circuit configured to generate a plurality of driver slice control codes in response to said plurality of digital filter control codes; and a plurality of source series terminated driver slices configured to generate an output signal according to a selected one of said plurality of communication specifications in response to said plurality of driver slice control codes, a main cursor signal, a pre-cursor signal, and a post cursor signal.