| 发明名称 |
SEMICONDUCTOR DEVICE INCLUDING PLURAL CHIPS STACKED TO EACH OTHER |
| 摘要 |
A device includes a plurality of Dynamic Random Access Memory (DRAM) chips in a stacked configuration connected by through silicon vias (TSVs), and each of the plurality of DRAM chips being configured to provide a local bank active signal to indicate when any one of a plurality of banks on a respective one of the plurality of DRAM chips is active, and local bank active signals from the plurality of DRAM chips being supplied through TSVs of intervening ones of the plurality of DRAM chips to a lowermost one of the plurality of DRAM chips. |
| 申请公布号 |
US2014177367(A1) |
申请公布日期 |
2014.06.26 |
| 申请号 |
US201414189896 |
申请日期 |
2014.02.25 |
| 申请人 |
HAYASHI Junichi |
发明人 |
HAYASHI Junichi |
| 分类号 |
G11C11/403;H01L27/108 |
主分类号 |
G11C11/403 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A device comprising:
a plurality of Dynamic Random Access Memory (DRAM) chips in a stacked configuration connected by through silicon vias (TSVs), and each of the plurality of DRAM chips being configured to provide a local bank active signal to indicate when any one of a plurality of banks on a respective one of the plurality of DRAM chips is active, and local bank active signals from the plurality of DRAM chips being supplied through TSVs of intervening ones of the plurality of DRAM chips to a lowermost one of the plurality of DRAM chips. |
| 地址 |
Tokyo JP |
