Adaptive Data Collection Practices in a Multi-Processor Device

摘要

Adaptive data collection practices in a multi-processor device. The device may include a first processor and a second processor. The first processor may operate in any of a plurality of power states. The first processor may indicate to the second processor when it transitions to a different power state. The second processor may collect information relating to its operation. The second processor may collect the information according to different information collecting modes depending on in which power state the first processor is operating. Less information may be collected in an information collecting mode corresponding to a lower power state of the first processor than in an information collecting mode corresponding to a higher power state of the first processor.

主权项

1. A wireless user equipment (UE) device, comprising:
a first processor, wherein the first processor is an application processor configured to provide application layer functionality, and
a second processor operatively coupled to the first processor, wherein the second processor is a baseband processor configured to provide wireless communication functionality, wherein the second processor is configured to collect information relating to its operation and store the collected information in a local buffer for transfer to the first processor,wherein the second processor is configured to collect the information relating to its operation according to a first information collecting mode when the first processor operates in an active state, wherein the second processor is configured to collect the information relating to its operation according to a second information collecting mode when the first processor operates in a low power state, wherein less information is collected in the second information collecting mode than in the first information collecting mode,wherein the first processor is configured to provide indications to the second processor when the first processor transitions between the active state and the low power state,wherein the second processor is configured to transition between the first information collecting mode and the second information collecting mode based on the indications.