发明名称
摘要 A semiconductor memory device includes diffusion regions formed in an active region; cell contacts connected to the diffusion regions, respectively; pillars connected to the cell contacts, respectively; a bit line connected to the pillar; capacitor contacts connected to the pillars, respectively; and storage capacitors connected to the capacitor contacts, respectively. Accordingly, the pillars exist between the cell contacts and the capacitor contacts, and thus, depths of the capacitor contacts are made correspondingly shorter. Therefore, it becomes possible to prevent occurrence of shorting defects while decreasing resistance values of the capacitor contacts.
申请公布号 JP5529365(B2) 申请公布日期 2014.06.25
申请号 JP20070022842 申请日期 2007.02.01
申请人 发明人
分类号 H01L21/8242;H01L21/768;H01L23/522;H01L27/108 主分类号 H01L21/8242
代理机构 代理人
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