发明名称 A monitoring unit as well as method for predicting abnormal operation of time-triggered computer system
摘要 A Monitor Processor that has been designed to determine whether the time triggered main processor is about to execute a task that is not in accordance with the active task schedule. A Control Mechanism (such as comprising a System Control output, a Communication Link B, a Reset Link) by means of which the Monitor Processor can halt or reset the Main Processor and take other corrective actions involving devices to which the computer system is connected, if the Monitor Processor determines that the Main Processor is about to execute a task that is not in accordance with the active schedule. Connected devices may be controller, or the processor may be halted or reset. Such TT designs may be used in safety critical systems with multiple system modes.
申请公布号 GB201408285(D0) 申请公布日期 2014.06.25
申请号 GB20140008285 申请日期 2014.05.11
申请人 SAFETTY SYSTEMS LTD 发明人
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