发明名称 ELECTRICAL INTERCONNECT FORMED THROUGH BUILDUP PROCESS
摘要 <p>The present invention relates generally to an electronic chip package that can include a die and a buildup layer substantially enveloping the die. Electrical interconnects can be electrically coupled to the die and passing, at least in part, through the buildup layer. An optical emitter can be electrically coupled to the die as a first electrical interconnect and configured to emit light from a first major surface of the electronic chip package. A solder bump can be electrically coupled to the die as a second electrical interconnect and positioned on a second major surface of the electronic chip package different from the first major surface.</p>
申请公布号 KR20140078561(A) 申请公布日期 2014.06.25
申请号 KR20130156604 申请日期 2013.12.16
申请人 INTEL CORPORATION 发明人 ROY MIHIR K;MANUSHAROW MATHEW J
分类号 H01L23/48;H01L23/12 主分类号 H01L23/48
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