Semiconductor device comprising a stacked die configuration including an integrated Peltier element

摘要

In a stacked semiconductor device, a Peltier element may be incorporated as a distributed element so as to provide active heat transfer from a high power device into a low power device, thereby achieving superior temperature control in stacked device configurations. For example, a CPU and a dynamic RAM device may be provided as a stacked configuration, wherein waste heat of the CPU may be efficiently distributed into the low power memory device.

主权项

1. A stacked semiconductor configuration, comprising
a first substrate; a first semiconductor layer formed above said first substrate; first circuit elements formed in and above said first semiconductor layer; a plurality of first semiconductor regions and a plurality of second semiconductor regions formed in said first substrate, said first and second semiconductor regions having different conduction band energy levels; a first wiring system formed above said first substrate and comprising a plurality of first connections, each of which connects one of said plurality of first semiconductor regions with one of said plurality of second semiconductor regions; a second substrate attached to said first substrate; and a second wiring system formed above said second substrate and comprising a plurality of second connections, each of which connects one of said plurality of first semiconductor regions with one of said plurality of second semiconductor regions.