VERTICAL THIN FILM TRANSISTOR AND FABRICATING METHOD THEREOF

摘要

A vertical thin film transistor includes a substrate, a first wall, a second wall, a source electrode, a drain electrode, a semiconductor layer, a gate insulating layer, and a gate electrode. The first wall and the second walls are spaced apart from each other on the substrate. The source electrode is formed on a top surface of the first wall. The drain electrode is provided on the substrate between the first and second walls. The semiconductor layer is formed on the source electrode, a sidewall of the first wall, and the drain electrode. The gate insulating layer covers the first and second walls, the source and drain electrodes, and the semiconductor layer. The gate electrode is disposed between the first and second walls in a planar view. The vertical thin film transistor may be formed without a mask.

主权项

1. A vertical thin film transistor, comprising:
a substrate; a first wall provided on the substrate; a second wall provided on the substrate and spaced apart from the first wall; a source electrode formed on a top surface of the first wall; a drain electrode provided on the substrate between the first wall and the second wall; a semiconductor layer formed on the source electrode, a sidewall of the first wall, and the drain electrode; a gate insulating layer covering the first wall, the second wall, the source electrode, the drain electrode, and the semiconductor layer; and a gate electrode formed on the gate insulating layer, the gate electrode being formed between the first wall and the second wall in a planar view.