Method and Apparatus for Isolating and/or Debugging Defects in Integrated Circuit Designs

摘要

Method and apparatus for debugging aspects of integrated circuit (IC) designs employ techniques by which defective intellectual property (IP) in those IC designs can be exercised, and defects identified, without disturbing the IP itself, but at the same time isolating the source of the defect(s) to the responsible IP provider(s). The IP provider then can debug the IP. In one aspect, the techniques give the IP provider(s) specific information about the nature of the defect, facilitating the provider's efforts to debug the IP.

主权项

1. A computer-implemented method of isolating one or more defects in an integrated circuit (IC) design, the method comprising:
using a processor to identify an IC design defect during a debugging procedure; and relating the IC design defect to an IC design component provided by a third party, wherein the relating comprises:
a) obtaining first data related to the third party IC design component;b) using a processor to obtain second data related to the defect;c) analyzing the first and the second data to identify a correlation between the two; andd) based on results of the analyzing, attributing a source of the IC design defect to the third party IC design component.