发明名称 |
PROCESS CHARGING PROTECTION FOR SPLIT GATE CHARGE TRAPPING FLASH |
摘要 |
A semiconductor device and method of making such device is presented herein. The semiconductor device includes a plurality of memory cells, a plurality of p-n junctions, and a metal trace of a first metal layer. Each of the plurality of memory cells includes a first gate disposed over a first dielectric, a second gate disposed over a second dielectric and adjacent to a sidewall of the first gate, a first doped region in the substrate adjacent to the first gate, and a second doped region in the substrate adjacent to the second gate. The plurality of p-n junctions are electrically isolated from the doped regions of each memory cell. The metal trace extends along a single plane between a via to the second gate of at least one memory cell in the plurality of memory cells, and a via to a p-n junction within the plurality of p-n junctions. |
申请公布号 |
WO2014093654(A2) |
申请公布日期 |
2014.06.19 |
申请号 |
WO2013US74732 |
申请日期 |
2013.12.12 |
申请人 |
SPANSION LLC |
发明人 |
CHEN, CHUN;HADDAD, SAMEER;CHANG, KUO, TUNG;RAMSBEY, MARK;KIM, UNSOON;FANG, SHENQING |
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