发明名称 Processing apparatus, test signal generator, and method of generating test signal
摘要 <p>A first test signal receiver (12) that receives first test signals output from a first test signal output terminal (20) in response to a test start instruction; a decision maker (14) that determines whether or not the first test signals are being input to a tested portion; a second test signal output terminal (13) that outputs a second test signal if the decision maker (14) determines that the first test signals are not being input; and an increment processor (15) that increments a count value stored by a counter (21) that counts the count value used for flow control, in sync with the second test signal, are provided, thereby providing a technique which can load an tested target effectively during a load test.</p>
申请公布号 EP2552064(B1) 申请公布日期 2014.06.18
申请号 EP20120172371 申请日期 2012.06.18
申请人 FUJITSU LIMITED 发明人 IWASAKI, SHINICHI
分类号 H04L12/26;H04L12/70 主分类号 H04L12/26
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