发明名称 Integrated circuit with power state determination circuit
摘要 An integrated circuit in which a power terminal, a ground terminal, an input terminal and an internal circuit are formed, has a unidirectional circuit of a direction from the input terminal to the power terminal, the unidirectional circuit being provided between the input terminal and the power terminal; and a power state determination circuit which detects whether the power terminal is connected to an external power source or not to output a power open detection signal. And the unidirectional circuit includes a first transistor in which a voltage of the power terminal is applied to a gate, and a second transistor connected to the first transistor in series, and a voltage of the external power source is input to the input terminal.
申请公布号 US8754632(B2) 申请公布日期 2014.06.17
申请号 US201113159543 申请日期 2011.06.14
申请人 Fujitsu Semiconductor Limited 发明人 Sugiyama Hidetoshi;Nagasawa Takayuki;Suzuki Hideaki
分类号 G01R19/00 主分类号 G01R19/00
代理机构 Fujitsu Patent Center 代理人 Fujitsu Patent Center
主权项 1. An integrated circuit in which a power terminal, a ground terminal, an input terminal and an internal circuit are formed, comprising: a unidirectional circuit of a direction from the input terminal to the power terminal, the unidirectional circuit being provided between the input terminal and the power terminal, the unidirectional circuit including a first transistor and a second transistor, a voltage of the power terminal being applied to a gate of the first transistor, the first transistor and the second transistor being connected in series between the input terminal and the power terminal; and a power state determination circuit which detects whether the power terminal is connected to an external power source or not to output a power open detection signal, wherein a voltage of the external power source is input to the input terminal.
地址 Yokohama JP