发明名称 III-N SEMICONDUCTOR-ON-SILICON STRUCTURES AND TECHNIQUES
摘要 <p>III-N semiconductor-on-silicon integrated circuit structures and techniques are disclosed. In some cases, the structure includes a first semiconductor layer formed on a nucleation layer, the first semiconductor layer including a 3-D GaN layer on the nucleation layer and having a plurality of 3-D semiconductor structures, and a 2-D GaN layer on the 3-D GaN layer. The structure also may include a second semiconductor layer formed on or within the first semiconductor layer, wherein the second semiconductor layer includes AlGaN on the 2-D GaN layer and a GaN layer on the AlGaN layer. Another structure includes a first semiconductor layer formed on a nucleation layer, the first semiconductor layer comprising a 2-D GaN layer on the nucleation layer, and a second semiconductor layer formed on or within the first semiconductor layer, wherein the second semiconductor layer includes AlGaN on the 2-D GaN layer and a GaN layer on the AlGaN layer.</p>
申请公布号 WO2014088639(A2) 申请公布日期 2014.06.12
申请号 WO2013US45442 申请日期 2013.06.12
申请人 INTEL CORPORATION;DASGUPTA, SANSAPTAK;THEN, HAN WUI;RADOSAVLJEVIC, MARKO;MUKHERJEE, NILOY;CHAU, ROBERT S. 发明人 DASGUPTA, SANSAPTAK;THEN, HAN WUI;RADOSAVLJEVIC, MARKO;MUKHERJEE, NILOY;CHAU, ROBERT S.
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