发明名称 AMPLIFIER
摘要 PROBLEM TO BE SOLVED: To reduce an offset between differential output signals.SOLUTION: An amplifier 10 includes an input terminal 10a and an input terminal 10b, a TIA 20, and a compensation circuit 60. The TIA 20 includes a first transistor 21, a second transistor 22, a first current source 23 connected to the input terminal 10a and an emitter terminal 21e, a second current source 24 connected to the input terminal 10b and an emitter terminal 22e, a first loading resistor 25 connected to a collector terminal 21c, and a second loading resistor 26 connected to a collector terminal 22c. A base terminal 21b and a base terminal 22b are supplied with a bias signal Vbias. The offset compensation circuit 60 regulates a first load current IL1 and a second load current IL2 on the basis of voltage signals Voutp, Voutn. The TIA 20 outputs the voltage signals Voutp, Voutn on the basis of collector voltages Vc1, Vc2.
申请公布号 JP2014107630(A) 申请公布日期 2014.06.09
申请号 JP20120257583 申请日期 2012.11.26
申请人 SUMITOMO ELECTRIC IND LTD 发明人 SUGIMOTO YOSHIYUKI
分类号 H03F3/34;H03F3/08 主分类号 H03F3/34
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