Three-dimensional wafer stacking with vertical interconnects

摘要

Described are three-dimensional stacked semiconductor structures having one or more vertical interconnects. Vertical stacking relies on vertical interconnects and wafer bonding using a patternable polymer. The polymer is preferably lithographically patternable and photosensitive. Curing of the polymer is preselected from about 35% to up to about 100%, depending on a desired outcome. When fabricated, such vertically stacked structures include electrical interconnects provided by solder reflow. Solder reflow temperature is bounded by a curing and glass transition temperatures of a polymer used for bonding.

主权项

1. A method for forming a three dimensional stacked structure, the method comprising:
forming and patterning a first polymer layer onto a first surface of a first substrate, using a first polymer which is thermally compressible; adding one or more first conductive materials to the first surface of the first substrate to form a layer with a thickness smaller than the thickness of the first polymer layer and wherein the layer of the one or more first conductive materials, at least partially, will not cover the first polymer layer during a bonding step; forming and patterning a second polymer layer on a second surface of a second substrate, using a second polymer which is thermally compressible; adding one or more second conductive materials onto the second surface of the second substrate to form a layer with a thickness smaller than the thickness of the second polymer layer and wherein layer of the one or more second conductive materials, at least partially, will not cover the second polymer layer during the bonding step; aligning the first conductive materials on the first surface of the first substrate against the second conductive materials on the second surface of the second substrate; bonding the first polymer layer on the first substrate with the second polymer layer on the second substrate, by heating the substrates to a bonding temperature and by applying sufficient bonding pressure, to produce a bonded pair of substrates; and forming at least one vertical interconnect between the first and second substrates, by heating the first and second substrates to a reflow temperature of the first and second conductive materials and reflowing the first and second conductive materials.