Liquid crystal display and thin film transistor array panel therefor

摘要

A liquid crystal display (LCD) is provided, which includes: first and second gate lines, a data line intersecting the gate lines, first to fourth drain electrodes located near the intersections between the first and second gate lines and the data line, and a coupling electrode. First to fourth pixel electrodes respectively connected to the first to fourth drain electrodes are also provided, and the first pixel electrode is connected to the coupling electrode while the fourth pixel electrode overlaps the coupling electrode. The LCD further includes a common electrode opposite the pixel electrodes, a liquid crystal layer interposed between the pixel electrodes and the common electrode, and a domain partitioning member formed on at least one of the pixel electrode and the common electrode. Two long edges of the domains are angled with respect to the first and the second gate lines or the data line substantially by about 45°.

主权项

1. A liquid crystal display, comprising:
a first substrate comprising a plurality of pixels, the pixels comprising a first pixel and a second pixel, a plurality of gate lines, and a plurality of conductive lines, each of the conductive line disposed between two adjacent gate lines; a second substrate facing the first substrate; a liquid crystal layer interposed between the first and second substrates; and a plurality of domain forming members provided on at least one of the first and second substrates, wherein the first pixel comprises a first pixel electrode and a second pixel electrode, wherein the second pixel comprises a third pixel electrode and a fourth pixel electrode, wherein the plurality of domain forming members including first and second domain members are oblique to the gate lines, wherein the first pixel electrode and the second pixel electrode of the first pixel are connected to a first gate line and a first data line, wherein the third pixel electrode and the fourth pixel electrode of the second pixel are connected to a second gate line and the first data line, wherein a first portion of the conductive line is overlapped by a portion of the second pixel electrode of the first pixel and a second portion of the conductive line is overlapped by a portion of the third pixel electrode of the second pixel, and wherein the second pixel electrode of the first pixel is disposed opposite to the third pixel electrode of the second pixel with respect to the conductive line.