发明名称 Double-swing clock generator and charge pump
摘要 A double-swing clock generator includes a first double-swing clock generation circuit and a second double-swing clock generation circuit. The first double-swing clock generation circuit is used for receiving a first voltage, a second voltage, a first clock, an inverse first clock, and a third voltage, and outputting a first double-swing clock. The second double-swing clock generation circuit is used for receiving a fourth voltage, the second voltage, the first clock, the inverse first clock, and the third voltage, and outputting a second double-swing clock.
申请公布号 US8742836(B2) 申请公布日期 2014.06.03
申请号 US201213556182 申请日期 2012.07.23
申请人 Etron Technology, Inc. 发明人 Chang Yen-An;Yang Hao-Jan
分类号 G05F1/10 主分类号 G05F1/10
代理机构 代理人
主权项 1. A double-swing clock generator, comprising: a first double-swing clock generation circuit for receiving a first voltage, a second voltage, a first clock, an inverse first clock, and a third voltage, and outputting a first double-swing clock, wherein a swing of the first double-swing clock is two times to a swing of the first clock, the first double-swing clock generation circuit comprising: a first precharge unit for receiving the first voltage and the second voltage;a first capacitor coupled to the first precharge unit for receiving the first clock;a first charge transfer unit coupled to the first precharge unit for receiving the inverse first clock and outputting the first double-swing clock; anda second precharge unit coupled to the first charge transfer unit for receiving the third voltage; and a second double-swing clock generation circuit for receiving a fourth voltage, the second voltage, the inverse first clock, the first clock, and the third voltage, and outputting a second double-swing clock, wherein a swing of the second double-swing clock is two times to the swing of the first clock, the second double-swing clock generation circuit comprising: a third precharge unit for receiving the fourth voltage and the second voltage;a second capacitor coupled to the third precharge unit for receiving the inverse first clock;a second charge transfer unit coupled to the third precharge unit for receiving the first clock and outputting the second double-swing clock; anda fourth precharge unit coupled to the second charge transfer unit for receiving the third voltage.
地址 Hsinchu TW
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