发明名称 Display device using pixel memory circuit to reduce flicker with reduced power consumption
摘要 A display device where a memory circuit is installed into each pixel without generating flicker, including a plurality of pixels arranged in a matrix, wherein each pixel has a light-transmissive element controlling the amount of transmissive light in response to a voltage difference between a first electrode and a second electrode, a memory circuit storing the voltage level of the first electrode, and a controller. In the case where the first electrode has a positive voltage level with respect to the second electrode at a refreshing timing, the controller makes the memory circuit store the voltage level of the first electrode, applies a first predetermined voltage to the second electrode to increase the voltage level of the first electrode by the first predetermined voltage, and discharges the first electrode so that the first electrode has a negative voltage level with respect to the second electrode.
申请公布号 US8736591(B2) 申请公布日期 2014.05.27
申请号 US201113278538 申请日期 2011.10.21
申请人 YAMASHITA KEITARO;CHIMEI INNOLUX CORPORATION 发明人 YAMASHITA KEITARO
分类号 G09G3/36;G06F3/038;G09G5/00 主分类号 G09G3/36
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