发明名称 |
COG panel system arrangement |
摘要 |
Provided is a COG panel system capable of minimizing a block dim effect by considering a relationship among a plurality of chips. The COG panel system includes: an FPC which supplies at least two power supply voltages having a constant voltage level; a plurality of SDIs which are commonly supplied with a bypass power supply voltage from the FPC and generate respective parts of a plurality of consecutive LCD driving signals required for an arbitrary one line of an LCD; and at least one block dim correction resistance. |
申请公布号 |
US8730214(B2) |
申请公布日期 |
2014.05.20 |
申请号 |
US20090991553 |
申请日期 |
2009.04.29 |
申请人 |
KIM KYUNG CHUN;KIM AN YOUNG;NA JOON HO;KIM DAE SEONG;SILICON WORKS CO., LTD. |
发明人 |
KIM KYUNG CHUN;KIM AN YOUNG;NA JOON HO;KIM DAE SEONG |
分类号 |
G06F3/038;G02F1/1343 |
主分类号 |
G06F3/038 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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