发明名称 Power Line Lowering for Write Assisted Control Scheme
摘要 Some embodiments of the present disclosure relate to a memory array having a cell voltage generator configured to provide a cell voltage header to a plurality of memory cells. The cell voltage generator is connected to the memory cells by way of supply voltage line and controls a supply voltage of the memory cells. The cell voltage generator has a pull-down element coupled between a control node of the supply voltage line and a ground terminal, and a one or more pull-up elements connected in parallel between the control node and a cell voltage source. A control unit is configured to provide one or more variable valued pull-up enable signals to input nodes of the pull-up elements. The variable valued pull-up enable signals operate the pull-up elements to selectively connect the supply voltage line from the cell voltage source to provide a cell voltage header with a high slew rate.
申请公布号 US2014133219(A1) 申请公布日期 2014.05.15
申请号 US201213674192 申请日期 2012.11.12
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO. LTD. 发明人 WU WEI-CHENG;CHAN WEI MIN;CHEN YEN-HUEI;LIAO HUNG-JEN
分类号 G11C5/14;G11C11/419 主分类号 G11C5/14
代理机构 代理人
主权项
地址