发明名称 |
Phase locked loop |
摘要 |
A phase locked loop comprising: an oscillator for generating an output signal of a frequency that is dependent on an input to the oscillator; sampling means for generating a sequence of digital values representing the output of the oscillator at moments synchronized with a reference frequency; a difference unit for generating a feedback signal representing the difference between successive values in the sequence; and an integrator for integrating the difference between the feedback signal and a signal of a desired output frequency; the signal input to the oscillator being dependent on the output of the integrator. |
申请公布号 |
US8723607(B2) |
申请公布日期 |
2014.05.13 |
申请号 |
US20080678106 |
申请日期 |
2008.08.19 |
申请人 |
STORY MICHAEL;SORNIN NICOLAS;CAMBRIDGE SILICON RADIO LIMITED |
发明人 |
STORY MICHAEL;SORNIN NICOLAS |
分类号 |
H03L7/099;H03J7/04;H03L7/02 |
主分类号 |
H03L7/099 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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