发明名称 Self-Aligned Silicide Bottom Plate for EDRAM Applications by Self-Diffusing Metal in CVD/ALD Metal Process
摘要 In one aspect, a method of fabricating a memory cell capacitor includes the following steps. At least one trench is formed in a silicon wafer. A thin layer of metal is deposited onto the silicon wafer, lining the trench, using a conformal deposition process under conditions sufficient to cause at least a portion of the metal to self-diffuse into portions of the silicon wafer exposed within the trench forming a metal-semiconductor alloy. The metal is removed from the silicon wafer selective to the metal-semiconductor alloy such that the metal-semiconductor alloy remains. The silicon wafer is annealed to react the metal-semiconductor alloy with the silicon wafer to form a silicide, wherein the silicide serves as a bottom electrode of the memory cell capacitor. A dielectric is deposited into the trench covering the bottom electrode. A top electrode is formed in the trench separated from the bottom electrode by the dielectric.
申请公布号 US2014120687(A1) 申请公布日期 2014.05.01
申请号 US201213665388 申请日期 2012.10.31
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 CAO QING;FANG SUNFEI;LI ZHENGWEN;LIU FEI;ZHANG ZHEN
分类号 H01L21/02 主分类号 H01L21/02
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