发明名称 Systems, apparatuses, and methods for zeroing of bits in a data element
摘要 Embodiments of systems, methods and apparatuses for execution a NAME instruction are described. The execution of a VPBZHI causes, on a per data element basis of a second source, a zeroing of bits higher (more significant) than a starting point in the data element. The starting point is defined by the contents of a data element in a first source. The resultant data elements are stored in a corresponding data element position of a destination.
申请公布号 GB201404575(D0) 申请公布日期 2014.04.30
申请号 GB20140004575 申请日期 2014.03.14
申请人 INTEL CORPORATION;VALENTINE, ROBERT 发明人
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