发明名称 Semiconductor device, semiconductor device design method, semiconductor design apparatus, and program
摘要 A potential-supply connection interconnect is provided in a multilayer interconnect layer. The potential supply connection interconnect overlaps some cell of I/O cells in the outer peripheral cell column and some cell of I/O cells in the inner peripheral cell column in a plan view. The potential-supply connection interconnect connects a power potential supply interconnect located below the outer peripheral cell column to a power potential supply interconnect located below the inner peripheral cell column and also connects a ground potential supply interconnect located below the outer peripheral cell column to a ground potential supply interconnect located below the inner peripheral cell column.
申请公布号 US8713508(B2) 申请公布日期 2014.04.29
申请号 US201213452801 申请日期 2012.04.20
申请人 TOMODA MASAFUMI;TSUKUDA MASAYUKI;RENESAS ELECTRONICS CORPORATION 发明人 TOMODA MASAFUMI;TSUKUDA MASAYUKI
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
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