发明名称 METHOD FOR REDUCING EXECUTION JITTER IN MULTI-CORE PROCESSORS WITHIN AN INFORMATION HANDLING SYSTEM
摘要 <p>A method of reducing execution jitter includes a processor having several cores and control logic that receives core configuration parameters. Control logic determines if a first set of cores are selected to be disabled. If none of the cores is selected to be disabled, the control logic determines if a second set of cores is selected to be jitter controlled. If the second set of cores is selected to be jitter controlled, the second set of cores is set to a first operating state. If the first set of cores is selected to be disabled, the control logic determines a second operating state for a third set of enabled cores. The control logic determines if the third set of enabled cores is jitter controlled, and if the third set of enabled cores is jitter controlled, the control logic sets the third set of enabled cores to the second operating state.</p>
申请公布号 WO2014062262(A2) 申请公布日期 2014.04.24
申请号 WO2013US51979 申请日期 2013.07.25
申请人 DELL PRODUCTS, L.P. 发明人 MOLLY, MICHAEL, KARL;KHATRI, MUKUND, P.;HORMUTH, ROBERT, WAYNE
分类号 G06F9/06 主分类号 G06F9/06
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