SYSTEMS AND METHODS FOR READING RESISTIVE RANDOM ACCESS MEMORY (RRAM) CELLS
摘要
<p>A system including a resistive random access memory cell connected to a word line and a bit line and a pre-charge circuit configured to pre-charge the bit line to a first voltage with the word line being unselected. A driver circuit selects the word line at a first time subsequent to the bit line being charged to the first voltage. A comparator compares a second voltage on the bit line to a third voltage supplied to the comparator and generates an output based on the comparison. A latch latches the output of the comparator and generates a latched output. A pulse generator generates a pulse after a delay subsequent to the first time to clock the latch to latch the output of the comparator and generate the latched output. The latched output indicates a state of the resistive random access memory cell.</p>
申请公布号
WO2014062558(A1)
申请公布日期
2014.04.24
申请号
WO2013US64811
申请日期
2013.10.14
申请人
MARVELL WORLD TRADE LTD.;SUTARDJA, PANTAS;WU, ALBERT;CHANG, RUNZI;LEE, WINSTON;LEE, PETER
发明人
SUTARDJA, PANTAS;WU, ALBERT;CHANG, RUNZI;LEE, WINSTON;LEE, PETER