发明名称 Method of forming top electrode for capacitor and interconnection in integrated passive device (IPD)
摘要 A method of manufacturing a semiconductor device includes providing a substrate having a first conductive layer disposed on a top surface of the substrate. A high resistivity layer is formed over the substrate and the first conductive layer. A dielectric layer is deposited over the substrate, first conductive layer and high resistivity layer. A portion of the dielectric layer, high resistivity layer, and first conductive layer forms a capacitor stack. A first passivation layer is formed over the dielectric layer. A second conductive layer is formed over the capacitor stack and a portion of the first passivation layer. A first opening is etched in the dielectric layer to expose a surface of the high resistivity layer. A third and fourth conductive layer is deposited over the first opening in the dielectric layer and a portion of the first passivation layer.
申请公布号 US8703548(B2) 申请公布日期 2014.04.22
申请号 US201313765478 申请日期 2013.02.12
申请人 STATS CHIPPAC, LTD. 发明人 LIN YAOJIAN;FRYE ROBERT C.
分类号 H01L21/339 主分类号 H01L21/339
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