发明名称 Enhanced transistor performance of N-channel transistors by using an additional layer above a dual stress liner in a semiconductor device
摘要 By forming an additional dielectric material, such as silicon nitride, after patterning dielectric liners of different intrinsic stress, a significant increase of performance of N-channel transistors may be obtained while substantially not contributing to a performance loss of the P-channel transistor.
申请公布号 US8697584(B2) 申请公布日期 2014.04.15
申请号 US20080017175 申请日期 2008.01.21
申请人 RICHTER RALF;WEI ANDY;BOSCHKE ROMAN;GLOBALFOUNDRIES INC. 发明人 RICHTER RALF;WEI ANDY;BOSCHKE ROMAN
分类号 H01L21/31 主分类号 H01L21/31
代理机构 代理人
主权项
地址