发明名称 Pop/Click Noise Reduction Circuitry For Power-Up And Power-Down of Audio Output Circuitry
摘要 Pop/clock noise reduction circuitry is disclosed for audio output circuitry. After audio output circuitry is enabled, reference voltage generator circuitry is then enabled to produce a reference voltage that ramps from a first voltage level to a second voltage level at a smooth rate. The ramping reference voltage is applied to the input of the audio output circuitry to reduce or prevent pop/click noise for the audio output circuitry. Further, negative offset control circuitry can also be used to provide a negative offset input to the audio output circuitry to remove initial step-up voltage levels that may exist at operational power-up for the audio output circuitry. Still further, current control circuitry can also be used that limits the available current flowing to the output node for the audio output circuitry, thereby further reducing and/or preventing potential pop/click noise in the audio output signals.
申请公布号 US2014098974(A1) 申请公布日期 2014.04.10
申请号 US201213647897 申请日期 2012.10.09
申请人 SILICON LABORATORIES INC. 发明人 VIEGAS EDUARDO
分类号 H04B15/00 主分类号 H04B15/00
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