发明名称 |
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE |
摘要 |
PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device capable of eliminating film thickness reduction in a trench element isolation structure while preventing deterioration in transistor characteristics without increasing the number of steps.SOLUTION: A method for manufacturing a semiconductor device comprises the steps of: forming a trench 2 by etching a trench element isolation region of a silicon substrate 1; forming an STI layer 3 composed of a thermal oxide film in the trench 2; depositing a polysilicon film 7 on the silicon substrate 1 in which the STI layer 3 is formed; forming an ON film 10 on the polysilicon film 7; forming a floating gate electrode 13 composed of the polysilicon film 7 on a memory region of the silicon substrate 1 by etching the ON film 10 and the polysilicon film 7 and exposing the STI layer 3 from under the ON film 10 and the polysilicon film 7; and covering the STI layer 3, the floating gate electrode 13, and the ON film 10 by depositing a protective oxide film 20 on the silicon substrate 1 by a CVD method. |
申请公布号 |
JP2014063895(A) |
申请公布日期 |
2014.04.10 |
申请号 |
JP20120208424 |
申请日期 |
2012.09.21 |
申请人 |
ASAHI KASEI ELECTRONICS CO LTD |
发明人 |
MIYAMOTO YASUICHIRO |
分类号 |
H01L21/8247;H01L21/336;H01L21/76;H01L27/10;H01L27/115;H01L29/788;H01L29/792 |
主分类号 |
H01L21/8247 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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