发明名称 |
INTEGRATED CIRCUIT HAVING A JUNCTIONLESS DEPLETION-MODE FET DEVICE |
摘要 |
A method for producing an integrated circuit, including, in this order: a) producing at least one MOS electronic circuit and/or at least one level of electrical interconnections on a substrate; b) uniformly implantating dopants in at least a portion of a layer of crystalline semiconductor; c) thermally activating the dopants implanted in the portion of the crystalline semiconductor layer; d) rigidly connecting the crystalline semiconductor layer to the substrate; and e) producing at least one junctionless depletion-mode FET device including a part of the portion of the crystalline semiconductor layer. |
申请公布号 |
EP2577730(B1) |
申请公布日期 |
2014.04.09 |
申请号 |
EP20110723087 |
申请日期 |
2011.06.06 |
申请人 |
COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIESALTERNATIVES |
发明人 |
ERNST, THOMAS;JAUD, MARIE-ANNE;BATUDE, PERRINE |
分类号 |
H01L21/74;H01L21/822;H01L27/06;H01L27/115;H01L29/78;H01L29/786 |
主分类号 |
H01L21/74 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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