发明名称 Method and apparatus for calibrating a read/write channel in a memory arrangement
摘要 A memory arrangement including a memory block and a controller. The memory block comprises a plurality of memory cells, wherein each memory cell operable to store one of a plurality of different levels of charge. The controller is configured to write (i) a first reference signal threshold into a first memory cell and (ii) a second reference signal threshold into a second memory cell. The first reference signal threshold corresponds to a first level of charge of the plurality of different levels of charge, and the second reference signal threshold corresponds to a second level of charge of the plurality of different levels of charge. Each of the first level of charge and the second level of charge is used to calibrate a read back of any of the one of the plurality of different levels of charge stored among the plurality of memory cells in the memory block.
申请公布号 US8693275(B1) 申请公布日期 2014.04.08
申请号 US201314021712 申请日期 2013.09.09
申请人 MARVELL INTERNATIONAL LTD. 发明人 RAMAMOORTHY ADITYA;BURD GREGORY;YANG XUESHI
分类号 G11C7/02 主分类号 G11C7/02
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