发明名称 |
Multi-port memory based on DRAM core |
摘要 |
A semiconductor memory device includes a plurality of N external ports, each of which receives commands, and an internal circuit which performs at least N access operations during a minimum interval of the commands that are input into one of the external ports. |
申请公布号 |
US8687456(B2) |
申请公布日期 |
2014.04.01 |
申请号 |
US201213601475 |
申请日期 |
2012.08.31 |
申请人 |
SATO AYAKO;MATSUMIYA MASATO;FUJITSU SEMICONDUCTOR LIMITED |
发明人 |
SATO AYAKO;MATSUMIYA MASATO |
分类号 |
G11C8/00;G11C7/22;G11C8/16;G11C8/18;G11C11/409 |
主分类号 |
G11C8/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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