发明名称 Frequency and voltage scaling architecture
摘要 A method and apparatus for scaling frequency and operating voltage of at least one clock domain of a microprocessor. More particularly, embodiments of the invention relate to techniques to divide a microprocessor into clock domains and control the frequency and operating voltage of each clock domain independently of the others.
申请公布号 US8689029(B2) 申请公布日期 2014.04.01
申请号 US201313780023 申请日期 2013.02.28
申请人 INTEL CORPORATION 发明人 MAGKLIS GRIGORIOS;GONZALEZ JOSE;GONZALEZ ANTONIO
分类号 G06F1/00;G06F1/26;G06F1/32 主分类号 G06F1/00
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