发明名称 Frequency multiplier and method of multiplying frequency
摘要 A frequency multiplier in accordance with some embodiments of the inventive concept may include a pulse generator receiving a differential clock signal from a delay locked loop having a plurality of delay cells to generate a pulse signal for generation of a multiplication clock signal. The pulse generator comprises an intermediate pulse signal generation unit receiving the differential clock signal to generate intermediate pulse signals; and an overlap correction unit correcting an overlap between the intermediate pulse signals to generate correction pulse signals.
申请公布号 US8686772(B2) 申请公布日期 2014.04.01
申请号 US201213613550 申请日期 2012.09.13
申请人 JUNG SEONG-OOK;JUNG JIWAN;RYU KYUNGHO;INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY 发明人 JUNG SEONG-OOK;JUNG JIWAN;RYU KYUNGHO
分类号 H03K3/84 主分类号 H03K3/84
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