发明名称 |
Flash memory with nano-pillar charge trap |
摘要 |
An embodiment of the present invention includes a non-volatile storage unit comprising a first and second N-diffusion well separated by a distance of P-substrate. A first isolation layer is formed upon the first and second N-diffusion wells and the P-substrate. A nano-pillar charge trap layer is formed upon the first isolation layer and includes conductive nano-pillars interspersed between non-conducting regions. The storage unit further includes a second isolation layer formed upon the nano-pillar charge trap layer; and at least one word line formed upon the second isolation layer and above a region of nano-pillar charge trap layer. The nano-pillar charge trap layer is operative to trap charge upon application of a threshold voltage. Subsequently, the charge trap layer may be read to determine any charge stored in the non-volatile storage unit, where presence or absence of stored charge in the charge trap layer corresponds to a bit value. |
申请公布号 |
US8687418(B1) |
申请公布日期 |
2014.04.01 |
申请号 |
US20090623369 |
申请日期 |
2009.11.20 |
申请人 |
RANJAN RAJIV YADAV;ABEDIFARD EBRAHIM;ESTAKHRI PETRO;KESHTBOD PARVIZ;AVALANCHE TECHNOLOGY, INC. |
发明人 |
RANJAN RAJIV YADAV;ABEDIFARD EBRAHIM;ESTAKHRI PETRO;KESHTBOD PARVIZ |
分类号 |
G11C11/34 |
主分类号 |
G11C11/34 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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