发明名称 Trench filling method and method of manufacturing semiconductor integrated circuit device
摘要 Provided is a trench filling method, which includes: forming a silicon oxide liner on a semiconductor substrate with trenches formed therein, the trenches including narrow-width portions having a first minimum isolation width and wide-width portions having a second minimum isolation width being wider than the first minimum isolation width; forming an oxidation-barrier film on the silicon oxide liner; forming a silicon liner on the oxidation-barrier film; filling the narrow-width portions with a first filling material; filling the wide-width portions with a second filling material; and oxidizing the silicon liner.
申请公布号 US8685832(B2) 申请公布日期 2014.04.01
申请号 US201213594217 申请日期 2012.08.24
申请人 WATANABE MASAHISA;TOKYO ELECTRON LIMITED 发明人 WATANABE MASAHISA
分类号 H01L21/76 主分类号 H01L21/76
代理机构 代理人
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