发明名称 Method of integrating a charge-trapping gate stack into a CMOS flow
摘要 Embodiments of a method of integration of a non-volatile memory device into a MOS flow are described. Generally, the method includes: forming a dielectric stack on a surface of a substrate, the dielectric stack including a tunneling dielectric overlying the surface of the substrate and a charge-trapping layer overlying the tunneling dielectric; forming a cap layer overlying the dielectric stack; patterning the cap layer and the dielectric stack to form a gate stack of a memory device in a first region of the substrate and to remove the cap layer and the charge-trapping layer from a second region of the substrate; and performing an oxidation process to form a gate oxide of a MOS device overlying the surface of the substrate in the second region while simultaneously oxidizing the cap layer to form a blocking oxide overlying the charge-trapping layer. Other embodiments are also disclosed.
申请公布号 US8685813(B2) 申请公布日期 2014.04.01
申请号 US201213428201 申请日期 2012.03.23
申请人 RAMKUMAR KRISHNASWAMY;CYPRESS SEMICONDUCTOR CORPORATION 发明人 RAMKUMAR KRISHNASWAMY
分类号 H01L21/8238 主分类号 H01L21/8238
代理机构 代理人
主权项
地址